Principal Analog Mixed-Signal Design Engineer – RF/SiPho/TIA/CMOS/SiGe

Hybrid 2 days a week minimum in our client’s Westlake Village location. Our client’s Broadband Analog group designs physical layer ICs for high-speed fiber optic data communication, TIAs, and drivers for SiPho and discrete EAMs and MZMs; while addressing the bandwidth, capacity and power issues faced by cloud computing and mega data center networks. Responsiblities include design and validation of FET and BiCMOS circuits for high-speed broadband ICs that serve these applications.

Responsibilities:

  • Active circuit design as well as technical leadership.
  • Design leading edge transimpedance amplifier design, primarily in SiGe, BiCMOS technology, where circuit performance will need to transcend beyond industry leading products.
  • Develop transmission line structures and other millimeter wave structures to enable higher performance than would normally be achievable.
  • Design of hi-performance broadband analog circuits for optical front-end receivers.
  • Design of various other analog circuits including linear regulators, AGC loop, current/voltage sensors, bandgaps etc.
  • Develop microarchitecture of major circuit blocks and guide team of designers to implement them. Work with various technologies including SiGe BiCMOS and CMOS.
  • Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support.

Qualifications:

  • Bachelor’s degree in Electrical Engineering  in the areas of design of high-performance RF/Analog
  • Receiver/TIA design and 10 – 15 years experience Or MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.
  • Proven experience in IC design including chip tape-out AND lab evaluation of receiver design.
  • Solid experience in. Using EDA CAD tools; Performing Analog Custom Layout
  • Experience in measuring IC performance and debug of design to correlate simulations to measurements
  • Deep understanding of fundamentals, including: Detailed transistor level design; Device physics
    Control/Feedback loop stability analysis
  • Direct project experience in at least one of the following areas is a plus: AGC loop design; High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
    Experience in CTLE design
  • Experience in Package-System integration issues desired
  • Project experience in using different technologies. (SiGe BiCMOS is a plus)
  • A team-player

Highly desirable skillset:

  • Overseeing and mentoring junior circuit designers;
  • Experience as chip lead with success in silicon
  • Experience in taking chips to mass production
  • Ability to translate chip level specifications into architecture
  • Strong communication, presentation and documentation skills.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. A total compensation package with a base, bonus and equity. Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in the designated office.

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